Speedgoat

General

Analog input section (at 25ºC)

Configuration: 12 differential analog input channels, dedicated Sigma-Delta A/D converter per channel, DC-coupled
Sample rate: 2k to 200k samples per second (ksps) per channel
Oversampling factor:

2-50ksps: x128

50-100ksps: x64

100-200ksps: x32

Sampling mode: Simultaneous, all active input channels, Sigma-Delta conversion
Voltage ranges: Software selectable as ±10V, ±5V or ±2.5V
Input impedance: 1 MOhm typical in parallel with 20pF, 2MOhm line-to-line
Common mode rejection: 80dB to 1kHz, 60dB to 50kHz, typical
Common mode range: ±11V with zero normal-mode input
Overvoltage protection: ±25V transients with power applied, ±45 Volts with power removed
Bandwidth (-3dB): DC to typically 49% of selected sample rate for sample rates to 100ksps, or to 35% of sample rate from 100ksps to 200ksps. Typically DC to 70kHz overall
Passband ripple: ±0.06dB maximum
Phase skew: Typically less than 55ns (0.1° for Fsig=5kHz), with Fsig/Fsamp < 0.35; channel-channel, excluding noise, with high-frequency image filter
ADC stopband:

2-50ksps: 0.58 Fsamp (threshold), 93dB (rejection)

50-100ksps: 0.68 Fsamp (threshold), 90dB (rejection)

100-200ksps: 0.78 Fsamp (threshold), 95dB (rejection)

Anti-alias filtering: Each ADC provides linear-phase digital anti-alias filtering indicated for "ADC stopband". A 2-pole lowpass analog filter in each channel provides a software-selectable cutoff frequency of either 40kHz or 270kHz, and suppresses images from the digital filter. Optional alternative frequencies are available.
Dynamic range: 100dB typical 2ksps to 100ksps, 80 dB from 100ksps to 200ksps
SINAD (signal to noise-and-distortion ratio): 93dB typical to 10kHz input bandwidth, 85kHz typical to 50kHz
Inter-channel crosstalk: -96dB typical to 50kHz
DC accuracy (mean composite error after autocalibration):

±10V range: ± 0.5mV (midscale zero accuracy), Gain accuracy at Fsamp: ± 0.9% (2-4ksps), ± 0.3% (4-15ksps), ± 0.1% (15-200ksps)

±5V range: ± 0.3mV (midscale zero accuracy), Gain accuracy at Fsamp: ± 0.9% (2-4ksps), ± 0.3% (4-15ksps), ± 0.1% (15-200ksps)

±2.5V range: ± 0.1mV (midscale zero accuracy), Gain accuracy at Fsamp: ± 0.9% (2-4ksps), ± 0.3% (4-15ksps), ± 0.1% (15-200ksps)

Customer quote

"Up and running in less than a day!"

Darren Hartman,
HUSCO International

News

Automatic HDL code generation for Speedgoat's FPGA-based I/O modules for Real-Time Simulation and Testing on FPGAs
(08-April-2011) Read more

Performance real-time target machine now supports i5 multi-core CPUs with clock rates up to 3.6GHz
(08-April-2011) Read more

Mobile real-time target machine now supports dual-core CPUs with clock rates up 2.16GHz
(14-March-2011) Read more

New 18-bit analog input I/O module with up to 32 channels
(03-January-2011) Read more

MathWorks and Speedgoat launch xPC Target Turnkey solution(25-August-2010) Read more