IO303 data sheet


Summary
Configurable FPGA-based pulse train I/O module with 16 TTL and 24 RS422 I/O lines and Xilinx Virtex-II chip with 7k logic cells. Delivery includes Speedgoat drivers for xPC Target, I/O cable, and terminal board.

Physical Description
Form factor PMC
PCI bus 32-bit, 33MHz
Power consumption 7.5W, maximal
Environmental Description
Operating temperature 0°C to +70°C (extended temperature version: -40ºC to +85ºC)
Relative humidity 5 to 95%, non-condensing
FPGA Description
FPGA chip Xilinx Virtex-II
No. of logic cells available 6,912
Digital (TTL)
Description
Transceiver type TTL
Number of I/O lines 16
Direction I/O lines individually programmable as inputs or outputs in groups of two
V-out-high 3.8V minimum
V-out-low 0.55V maximum
I-out-high -32mA
I-out-low 32mA
V-in-high 3.5V minimum
V-in-low 1.5V maximum
Digital (RS422)
Description
Transceiver type RS422 (differential)
Number of I/O lines 24
Direction I/O lines individually programmable as inputs or outputs
Differential driver output voltage with 50Ohm load 2V minimum, 5V maximum
Common mode output voltage 3V maximum
Differential input threshold voltage (-7V<=VCM<=12V) VCM= -0.2V minimum, 0.2V maximum
Input hysteresis 70mV, typical
Minimum input resistance 12kOhm
Fail-safe The receiver contains a fail-safe feature that results in a logic high output state if the inputs are unconnected (floating)
Termination resistors 120Ohm termination resistor networks are installed in sockets. Networks of 4 resistors each are used for the differential signals.

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HUSCO International

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