IO321 data sheet


Summary
Configurable FPGA-based I/O module with 16 CMOS and 22 RS485 differential front I/O lines, 56 LVCMOS/4 LVDS or 32 LVDS rear I/O lines, and Xilinx Virtex-4 chip with 41k logic cells. Delivery includes Speedgoat drivers for xPC Target, I/O cable, and terminal board.

Physical Description
Form factor PMC
PCI bus 64-bit, 66MHz
Environmental Description
Operating temperature 0°C to +70°C. Additional conduction cooling for systems with no cooling air flow.
Relative humidity 5 to 95%, non-condensing
FPGA Description
FPGA chip Xilinx Virtex-4
No. of logic cells available 41,472
Digital (front I/O)
Description
Transceiver type CMOS TTL and RS485
Number of I/O lines (front I/O) 16 CMOS TTL and 22 RS485
Direction I/O lines individually programmable as inputs or outputs in groups of two
V-out-high 3.8V minimum
V-out-low 0.55V maximum
I-out-high -32mA
I-out-low 32mA
V-in-high 3.5V minimum
V-in-low 1.5V maximum

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Customer quote

"Up and running in less than a day!"

Darren Hartman,
HUSCO International

News

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