User Datagram Protocol (UDP) / UDP/IP

The UDP protocol supported by xPC Target allows you to connect your target machine to your hardware under test by sharing the Ethernet port used for host/target Ethernet communication via a multi port Ethernet switch. On the other hand is not possible to use the UDP protocol using a separate/additional Ethernet connection (see Raw Ethernet support). UDP uses this direct method at the expense of reliability by limiting error checking and recovery.

The User Datagram Protocol (UDP) is a transport protocol layered on top of the Internet Protocol (IP) and is commonly known as UDP/IP. It is analogous to TCP/IP and mainly differentiates as follows:

TCP communication can be compared to a telephone conversation where a connection is required at all times and two-way streaming data (the words spoken by each party to the conversation) are exchanged. UDP, on the other hand, can be compared to sending letters by mail (without a return address). If the other party is not found, or the letter is lost in transit, it is simply discarded.

The analogy fails, however, when considering the speed of communication. Both TCP and UDP communication roughly happen at the same speed, because both use the underlying Internet Protocol (IP) layer.

Further information about the UDP protocol support can be found in the xPC Target User's Guide. To use the UDP protocol together with your Speedgoat real-time target machine please contact Speedgoat.

• HOME
• Products

• Real-time target
  machines
• I/O modules

• Analog
• Digital
• Serial
• Pulse train
• Protocols

• SSI
• CAN
• Raw Ethernet
• UDP
• SPI
• I2C
• J1939
• ARINC 429
• MIL-STD-1553

• Shared Memory
• Audio/speech
• Configurable FPGA

• Services
• Applications
• Customers
• Industries
• Support
• Exchange area
• Company

Customer quote

"Up and running in less than a day!"

Darren Hartman,
HUSCO International

News

New I/O Expansion chassis with six additional PCI slots
(03-May-2010) Read more

New Quadrature Decoding FPGA code module complementing the PWM and CAP FPGA code modules
(27-Apr-2010) Read more

New SPI and I2C FPGA-based configurable protocol support
(12-April-2010) Read more

New Education real-time target machine for mechatronic designs
(01-Mar-2010) Read more

Raw Ethernet, UDP, J1939, Arinc 429, MIL-STD-1553, Shared Memory, LVDT/ RVDT, and Synchro/ Resolver support (01-Jan-2010) Read more

xPC Target dual core and highest CPU clockrate support (3.33GHz) (04-Sep-2009) Read more

Read more news

Newsletter subscription