FPGA-based I/O modules

The 3xx FPGA-based I/O modules differentiate themselves by the number of I/O lines, supported transeivers (TTL, RS422, RS485, LVDS, LVCMOS, 105MHz A/D, ..), and the Xilinx FPGA chip version and size (no. of logic cells) allowing Spedgoat to implement project specific functionality including:

• Pulse train capture and generation:
  PWM, CAP (Capture), QAD (quadrature decoding)
• Event-based interrupt, trigger, and inversion support
• Protocols (SPI, I2C, ..)
• Generic digital inputs and outputs
• High-speed algorithmic subsystems (system design implementations)
• Analog I/O with lowest latency and/or special synchronization schemes

By default (in price included) Speedgoat implements the following FPGA Code Module functionality for the IO301-IO324:

3 x PWM, 3 x CAP , 3 x QAD, 1 x Interrupt, and 1 x Inversor. The remaining channels are available as generic digital inputs and outputs.

An implementation different from the setup outlined above can be developed and provided at the time of the I/O module purchase or at a later time.

There is no need for you to deal with FPGA programming unless you decide to implement FPGA functionality on your own using Speedgoat's FPGA engineering kits or other tools.

The available I/O modules to implement FPGA functionality include:

I/O module	FPGA chip	# logic cells	Standard I/O lines
IO301	Xilinx Virtex-II	7k	64 TTL
IO302	Xilinx Virtex-II	7k	32 RS422
IO303	Xilinx Virtex-II	7k	16 TTL and 24 RS422
IO304	Xilinx Virtex-II	7k	32 LVDS
IO311	Xilinx Virtex-II	24k	64 TTL
IO312	Xilinx Virtex-II	24k	32 RS422
IO313	Xilinx Virtex-II	24k	16 TTL and 24 RS422
IO314	Xilinx Virtex-II	24k	32 LVDS

I/O module	FPGA chip	# logic cells	Standard I/O lines	Auxiliary I/O lines (basic module)
IO322	Xilinx Virtex-4	41k	30 RS485	56 LVCMOS plus 4 LVDS or 32 LVDS
IO323	Xilinx Virtex-4	41k	16 TTL and 22 RS485	56 LVCMOS plus 4 LVDS or 32 LVDS
IO324	Xilinx Virtex-4	41k	30 LVDS	56 LVCMOS plus 4 LVDS or 32 LVDS
IO325	Xilinx Virtex-4	41k	2 16-bit 105MHz A/D signals	56 LVCMOS plus 4 LVDS or 32 LVDS

Additional FPGA-based I/O modules providing further functionality are available on request.

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