I2C protocol support for configurable FPGA I/O modules

To communicate with I2C (Inter IC-Bus) Speedgoat can implement FPGA Code Modules providing I2C protocol and controller functionality on any Configurable FPGA I/O module.

All Speedgoat FPGA Code Modules come with driver blocks for Simulink Real-Timeā„¢.




The provided Simulink blocksets support the following operations:

  • Single write
  • Multiple write
  • Single read
  • Multiple read



Legend:
SAD: Slave address, W: Write mode, R: Read mode, SAK: Slave acknowledge, NMAK: no Master acknowledge, MAK: Master acknowledge, SR: Start Repeated condition


Note that in read mode, a correct acknowledge always has a value of zero. Furthermore the last acknowledge signal (NMAK) is a non-acknowledge with a value of high, even if the last received byte was correct. The reason for this polarity is that a pull up resistor causes a standard high value whenever the line is not driven.

Contact us if you require other protocol support. Speedgoat is continuously extending the range of supported communication bus types and devices.

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